1. Field of the Invention
The present invention generally relates to ultrasonic test apparatuses, and particularly to an ultrasonic test apparatus for inspecting integrated circuits.
2. Description of Related Art
Integrated circuits (IC) are widely used in electronic devices. The ICs are fabricated and then packaged. However, during pre-packaging the ICs are tested for defects including crack and de-lamination etc., caused by environmental conditions. In order to detect these defects, ultrasonic test apparatuses are used.
Generally, an ultrasonic test apparatus includes a transmitting transducer and a receiving transducer. An IC to be tested for defects is separated from but between the transmitting transducer and the receiving transducer. During test, the transmitting transducer emits ultrasonic waves to the IC. The ultrasonic waves pass through the IC and are received by the receiving transducer on the other side of the IC. Certain defects (such as cracks or de-lamination) can cause certain changes (amplitude and/or phase) in the electrical signals. As such, if the electrical signals are measured when the IC is subjected to ultrasonic waves, certain defects of the IC can be identified. However, if the IC is not stably held during the ultrasonic test, noise may be induced due to vibrations or jitters. Such noise would affect the detection precision of the defects. That is, the ultrasonic test apparatus may not accurately measure the degree of defects of the IC.
Therefore, in order to accurately detect the defects, the IC should be stable and free from vibrations or jitters. Thus, providing an ultrasonic test apparatus satisfying this requirement is desired.